60 Second Clock for Digital Electronics

  • The two output displays are common cathode seven-segment displays that require a multiplexed signal.
  • Each display will use a 74LS48 BCD-to-Seven-Segment display driver in Design Mode.ย 
  • The ones-unit display (0โ€“9) is controlled by a synchronous counter designed with a 74LS163 MSI counter IC.ย 
  • The tens-unit display (0โ€“6) is controlled by a synchronous counter designed with SSI logic gates (J/K).
  • Any additional logic may be used as needed to support the counter designs.